The present invention generally relates to integrated circuits and, more particularly, to a capacitor in an integrated circuit.
Integrated circuits typically include many devices formed in the various layers of an integrated circuit die. Typically, electronic devices are formed using many MOS transistors.
A capacitor in an integrated circuit can be formed using parallel plates that are formed between layers of the die. These layers are typically referred to as poly 1, metal 1, metal 2, etc. Parallel plate capacitors in integrated circuits require a relatively large amount of area or xe2x80x9creal estate.xe2x80x9d
Another way to form a capacitor in an integrated circuit is to use MOS transistors. In the case of a MOS transistor, the capacitance value is a function of the applied voltage between the gate and the bulk of the die. Present deep sub-micron MOS transistors, however, are built with ultra-thin gate oxides. These types of transistors xe2x80x9cleakxe2x80x9d substantially, i.e. they do not retain a charge. Gate leakage occurs when the dielectric forming the gate oxide is not a perfect insulator and the current travels through the gate oxide.
The capacitance of a MOS capacitor is highly dependent on the applied voltage and its frequency, the threshold voltage of the MOSFET, and the temperature. At low voltages it is difficult to use a MOSFET as a capacitor if the threshold voltage and applied voltage are comparable. Building matching capacitors is extremely difficult to do in a process with ultra-thin gate oxide because minor variations in oxide thickness and applied voltages can make the two capacitances differ significantly. The leakage current through the gate oxide can only make the problem worse.